RISC-V Unleashed: India at the Forefront
SiFive RISC-V Day
February 15th, 2024 (Thu.) │ Hilton Bangalore Embassy GolfLinks
Leadership in the RISC-V Era: India's Exciting New Opportunity
Join SiFive for an informative afternoon session, featuring key thought leaders in the fast -growing global RISC-V ecosystem. Krste Asanovic, inventor of RISC-V and SiFive founder will be joined by academic and business leaders to provide an overview of RISC-V and the latest advances as well as talk about how RISC-V is a great opportunity for India to leap ahead in semiconductor technology leadership.
India’s strengths in software and hardware design are helping it jump ahead as RISC-V takes hold around the world, but the open standard brings a lot of competition from other regions. Our guests will discuss India’s strengths and talk about advances to date and how the country, and the companies doing business here should think about the opportunities ahead.
Join us for SiFive RISC-V Day India on February 15, 2024. Attend this free event to meet the pioneers driving RISC-V. A networking lunch will be held before the event. Don't miss out!
15 February, 2024 │ 12:30 to 17:00
Hilton Bangalore Embassy GolfLinks
Embassy Golf Links Business Park, Off Intermediate Ring Road I Bangalore 560071 I India
Agenda
Join Us for A Networking Lunch & Meet RISC-V Founders and Industry Leaders in Person!
| Time | Agenda |
|---|---|
| 12:30–13:50 (80 min) | Check-in & Networking Lunch |
| 13:50-14:00 (10 min) | Opening Remarks Gaurav Shrivastav, Senior Director, SiFive |
| 14:00-14:40 (40 min) | Keynote: RISC-V Global Momentum Krste Asanovic, Co-founder and Chief Architect, SiFive |
| 14:40-15:10 (30 min) | The Digital India RISC-V and the RISC-V Knowledge Centre Prof. Kamakoti Veezhinathan, Professor, IIT Madras |
| 15:10-15:30 (20 min) | Making India "Rising Semiconductor Product Nation" Dr. Satya Gupta, President, VLSI Society of India |
| 15:30-15:50 (20 min) | Closing Session and Q&A |
| 15:50-17:00 (70 min) | Networking over High Tea |
Meet the Pioneers Driving RISC-V
Krste Asanovic
RISC-V Inventor
Co-founder and Chief Architect of SiFive
Krste is SiFive’s Chief Architect and a Co-Founder. He is a member of the board of directors of the RISC‑V Foundation, also an ACM Fellow and an IEEE Fellow. Krste received his PhD from UC Berkeley, and a BA in Electrical and Information Sciences from the University of Cambridge.
Prof. V. Kamakoti
Kamakoti Veezhinathan received his M.S. and Ph.D. degrees in Computer Science and Engineering from IIT Madras. He joined the faculty of IIT Madras in 2001 and took over as its Director in January 2022.
He specializes in the area of Computer Architecture, Information Security and VLSI Design. More
Dr. Satya Gupta
Dr. Satya Gupta is a global techno-visionary in the Semiconductor and Electronics industry for more than 40 years. After a 12 years long corporate career at Intel where he worked on Processor Design, Cutting edge EDA tools and Supercomputing systems, he co-founded 4 successful start-ups, Intel Micro-Electronics, Open-Silicon, Concept-2-Silicon and SenZopt in semiconductor and electronics product areas. More
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- Conference content is subject to change.
- Please note that food and beverage options may be limited.
- If you have any questions, please contact market-cn@sifive.com
