REGISTER
SiFive Connect webinars are offered on two different time zones. Register below for your specific time:

Thursday, May 14
9 AM to 10 AM Pacific Standard Time
San Francisco
Register

Friday, May 15
9 AM to 10 AM China Standard Time
Beijing
Register

Show in my time zone

SiFive HBM2/2E IP Subsystem - Features and Implementation Guidelines

Join us for our next SiFive Connect webinar to learn more about the features of the HBM2/2E IP subsystem and how to implement the IP in an SoC. We’ll also address the market applications for HBM2/2E IP.

SiFive’s HBM2/2E IP subsystem solution is architected and designed to provide the highest performance and flexibility for integrating high bandwidth memory (HBM) directly into next-generation ASIC and 2.5D SoC system-in-package (SiP) solutions. It supports the HBM2/2E JEDEC specification for a multitude of foundry technology nodes.

Key Learnings:

  • Features of the HBM2/2E IP subsystem
  • Implementation guidelines for 2.5D SoC SiP
  • Market applications and other details

Target Audience:

AI chip designers, DRAM memory controller designers, high-speed interface IP designers, IP application engineers, IP architects and system engineers.

Can’t attend? Please register anyway and we will send you a link to the recording after the webinar.

Ketan Mehta
Director, SoC IP Product Marketing,
SiFive, Inc.

As the Director of SoC IP Product Marketing at SiFive, Ketan Mehta is responsible for Interlaken, Ethernet, HBM memory and other high-speed interfaces. With over 25 years of experience in engineering and product planning, Ketan has a rich background in IP connectivity solutions for various applications including networking, storage, data center and cloud. He received his M.S. degree in electrical engineering from The University of Texas at San Antonio, and his MBA from San Jose State University.

Picture1-4

Pranav Kale
Staff Engineer, SoC IP Engineering,
SiFive, Inc. 

Pranav Kale is a Staff Engineer in the SoC IP Engineering group at SiFive. He has nearly 10 years of experience in designing SoC IPs for flash memory controllers and DRAM memory controllers. Prior to joining SiFive, he worked at SoftJin Technologies, Sasken Technologies Ltd. and Marvell Semiconductor. Pranav earned his B.E. degree in electronics and telecommunication engineering at the Pune Institute of Computer Technology.

Picture1-4

Ritam Das Adhikari

Manager, SoC IP Applications,
SiFive, Inc.

With 15+ years of experience in design and applications engineering, Ritam serves as SoC IP Applications Manager at SiFive where he oversees the HBM2/2E IP subsystem, Ethernet, USB, Interlaken and peripheral IPs. Prior to joining SiFive, he was a senior applications engineer at Synopsys for over six years. Before that he worked for Xilinx, Rambus, Freescale, Spectralinear and Cypress. Ritam received his M.S. degree in microelectronics from the Birla Institute of Technology & Science, and his MBA from the Indian Institute of Management, Calcutta.



Picture1-4

 

Michael Gianfagna

Analyst,
SemiWiki

Moderator

SiFive-Connect-Logo-Black-small

The SiFive Connect webinar series is designed to be highly educational and interactive, offering attendees a direct connection to industry experts. Each one-hour long webinar will take place twice on the same day – once at 9 a.m. PDT and again at 6 p.m. PDT enabling our global audience to choose the time that works best for them. If you are unable to attend either of the events, please register anyway and we will send you a link to the recording after the webinar. 

New call-to-action

Contact us

+1 415 673-2836