Forum Highlight
There is lots going on over at the SiFive Forums, which you can access through the SiFive site. The forums are chalked full of valuable content that can answer your questions and curiosity surrounding RISC-V, development boards, IP evaluations and much more. Here’s a peek at some of the threads that have our attention (and will now have yours, too!):
Featured Developer Of the Month
Our view of the world centers around the developer, the engineer, the user, the dreamer. It’s you who are contributing to RISC-V and open-source, making what we would do at SiFive possible.
One of the coolest things about what we do is seeing all the various implementations and iterations of RISC-V based projects. And (not to play favorites), but perhaps one of the coolest implementations we’ve seen came by the way of QWERTY Embedded Design’s Michael Welling and the LoFive board. The LoFive board has generated tremendous buzz in Twittersphere - and for good reason! This thing seriously rocks; check it out!
We’d love to feature your SiFive project in the next newsletter - let us know what you are working on!
More Blog Posts
If you know us, you know that we are a chatty group. Here’s what has been on our minds (and our blog) over the past few months:
Introducing the U54-MC Coreplex IP - The First RISC-V Core with Linux Support by Jack Kang
RISC-V 101 Webinar by Jack Kang
SiFive; The Journey to Becoming the Easiest Company to do Business With by Sander Arts
Employee Q&A: Introducing Renxin Xia by Staff
SiFive in the Press
Want to see who has been talking about SiFive recently? Let’s take a look!
2018 Will be The Year of The RISC-V Linux Processors by Nick Farrell, Fudzilla
Linux Now Has its First Open Source RISC-V Processor by Chris Wiltz, Design News
SiFive Announces RISC-V SoC by Brian Benchoff, Hackaday
Hands-On HiFive RISC-V by Bill Wong, Electronic Design
Naveed Sherwani Takes Reins at SiFive by Paul McLellan, Cadence
SiFive’s Chief Executive on Opening a Chip Design Factory by James Morra, Electronic Design
RISC-V in the News
We’re always keeping an eye on RISC-V; after all, our founders invented it! Check out the latest conversations around the RISC-V ISA:
RISC-V Paper by Imperas at 15th International System-on-Chip (SoC) Conference 2017 by Staff, EE Journal
The Natural Evolution of Artificial Intelligence by Tiernan Ray, Barron’s
UltraSoC Expands After $6m Investment by Graham Pitcher, New Electronics
Roundtable: Experts Discuss Key Design Engineer Challenges by Staff, ECN Magazine
We would love to hear from you - reply to this email with any questions or inquiries and we will get right back to you!